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A high bandwidth constant gm and slew-rate rail-to-rail CMOS input stage and its application to analogue cells for low voltage VLSI systems

Redman-White, W. (1997) A high bandwidth constant gm and slew-rate rail-to-rail CMOS input stage and its application to analogue cells for low voltage VLSI systems IEEE Journal of Solid State Circuits, 32, (5), pp. 701-712.

Record type: Article

Abstract

A new rail-to-rail CMOS input architecture is presented that delivers behaviour nearly independent of the common-mode level in terms of both transconductance and slewing characteristics. Feedforward is used to achieve high common-mode bandwidth, and operation does not rely on analytic square law characteristics, making the technique applicable to deep submicron technologies. From the basis of a transconductor design, an asynchronous comparator and a video bandwidth op amp are also developed, providing a family of general purpose analog circuit functions which may be used in high (and low) bandwidth mixed-signal systems. Benefits for the system designer are that the need for rigorous control of common-mode levels is avoided and input signal swings right across the power supply range can be easily handled. A further benefit is that having very consistent performance, the circuits can be easily described in VHDL (or other behavioural language) to allow simulation of large mixed-signal systems. The circuits presented may be easily adapted for a range of requirements. Results are presented for representative transconductor, op amp, and comparator designs fabricated in a 0.5 um 3.3 V digital CMOS process.

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More information

Published date: May 1997
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 253304
URI: http://eprints.soton.ac.uk/id/eprint/253304
ISSN: 0018-9200
PURE UUID: fab840a0-b9f1-4c6b-adc7-e35d7be3b60d

Catalogue record

Date deposited: 09 Sep 2004
Last modified: 18 Jul 2017 09:59

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Contributors

Author: W. Redman-White

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