Proceedings of the Workshop on Verification and Computational Logic VCL'2000
Proceedings of the Workshop on Verification and Computational Logic VCL'2000
The aim of this workshop is to bring together researchers working on the interplay between verification techniques (e.g., model checking, reduction, and abstraction) and logic programming techniques (e.g., constraints, abstract interpretation, program transformation).
150pp
Leuschel, Michael
c2c18572-66cf-4f84-ade4-218ce3afe78b
Podelski, Andreas
04df6f01-0d7c-4b1a-b496-435676330288
Ramakrishnan, C.R.
e6d2e02f-bae6-43d7-bc28-851226b115cc
Ultes-Nitsche, Ulrich
bfc7f0a6-3cbb-40af-9935-6dce3a88a10b
July 2000
Leuschel, Michael
c2c18572-66cf-4f84-ade4-218ce3afe78b
Podelski, Andreas
04df6f01-0d7c-4b1a-b496-435676330288
Ramakrishnan, C.R.
e6d2e02f-bae6-43d7-bc28-851226b115cc
Ultes-Nitsche, Ulrich
bfc7f0a6-3cbb-40af-9935-6dce3a88a10b
Leuschel, Michael, Podelski, Andreas, Ramakrishnan, C.R. and Ultes-Nitsche, Ulrich
(2000)
Proceedings of the Workshop on Verification and Computational Logic VCL'2000.
.
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Conference or Workshop Item
(Other)
Abstract
The aim of this workshop is to bring together researchers working on the interplay between verification techniques (e.g., model checking, reduction, and abstraction) and logic programming techniques (e.g., constraints, abstract interpretation, program transformation).
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More information
Published date: July 2000
Additional Information:
Web page: http://www.ecs.soton.ac.uk/~mal/vcl2000.html Technical Report. Organisation: ALP Address: Technical Report of DSSE Research Group, University of Southampton (DSSE-TR-2000)
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 253709
URI: http://eprints.soton.ac.uk/id/eprint/253709
PURE UUID: 64979246-c6aa-4fab-82a6-5b5533163605
Catalogue record
Date deposited: 18 Jun 2001
Last modified: 10 Dec 2021 20:34
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Contributors
Author:
Michael Leuschel
Author:
Andreas Podelski
Author:
C.R. Ramakrishnan
Author:
Ulrich Ultes-Nitsche
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