Self heating effects in SOI MOSFETS and their measurement by small signal conductance techniques
Self heating effects in SOI MOSFETS and their measurement by small signal conductance techniques
Self-heating is an important issue for SOI CMOS, and hence, so is its characterization and modeling. This paper sets out how the critical parameters for modeling, i.e. thermal resistance and thermal time-constants, may be obtained using purely electrical measurements on standard MOS devices. A summary of the circuit level issues is presented, and the physical effects contributing to thermally related MOSFET behaviour are discussed. A new thermal extraction technique is presented, based on an analytically derived expression for the electro-thermal drain conductance in saturation. Uniquely, standard MOSFET structures can be used, eliminating errors due to additional heat flow through special layouts. The conductance technique is tested experimentally and results are shown to be in excellent agreement with thermal resistance values obtained from noise thermometry and gate resistance measurements using identical devices. It is demonstrated that the conductance technique can be used confidently over a wide range of bias conditions, with both fully and partially depleted devices.
2240 - 2248
Tenbroek, B M
d7af4b47-9b03-4a16-bac2-f30d4c063643
Redman-White, W
d5376167-c925-460f-8e9c-13bffda8e0bf
Lee, M S L
bafc771f-3562-4a77-a7cc-20326d2ba792
Bunyan, R J T
d9a64ca6-7cb9-4eba-8afa-294fe386aed0
Uren, M J
a01d904d-14a4-42f0-a027-631e4e37d4bf
December 1996
Tenbroek, B M
d7af4b47-9b03-4a16-bac2-f30d4c063643
Redman-White, W
d5376167-c925-460f-8e9c-13bffda8e0bf
Lee, M S L
bafc771f-3562-4a77-a7cc-20326d2ba792
Bunyan, R J T
d9a64ca6-7cb9-4eba-8afa-294fe386aed0
Uren, M J
a01d904d-14a4-42f0-a027-631e4e37d4bf
Tenbroek, B M, Redman-White, W, Lee, M S L, Bunyan, R J T and Uren, M J
(1996)
Self heating effects in SOI MOSFETS and their measurement by small signal conductance techniques.
IEEE Transactions on Electron Devices, 43 (12), .
Abstract
Self-heating is an important issue for SOI CMOS, and hence, so is its characterization and modeling. This paper sets out how the critical parameters for modeling, i.e. thermal resistance and thermal time-constants, may be obtained using purely electrical measurements on standard MOS devices. A summary of the circuit level issues is presented, and the physical effects contributing to thermally related MOSFET behaviour are discussed. A new thermal extraction technique is presented, based on an analytically derived expression for the electro-thermal drain conductance in saturation. Uniquely, standard MOSFET structures can be used, eliminating errors due to additional heat flow through special layouts. The conductance technique is tested experimentally and results are shown to be in excellent agreement with thermal resistance values obtained from noise thermometry and gate resistance measurements using identical devices. It is demonstrated that the conductance technique can be used confidently over a wide range of bias conditions, with both fully and partially depleted devices.
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Published date: December 1996
Organisations:
Nanoelectronics and Nanotechnology
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Local EPrints ID: 253718
URI: http://eprints.soton.ac.uk/id/eprint/253718
PURE UUID: be1fb272-1b4b-4bea-bb99-78127d231578
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Date deposited: 10 Sep 2004
Last modified: 09 Jan 2022 09:41
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Author:
B M Tenbroek
Author:
W Redman-White
Author:
M S L Lee
Author:
R J T Bunyan
Author:
M J Uren
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