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Practical 2-dimensional bipolar-transistor-analysis algorithm

Practical 2-dimensional bipolar-transistor-analysis algorithm
Practical 2-dimensional bipolar-transistor-analysis algorithm
0013-5194
599-600
Dubock, P A
7d05f246-288f-4d01-a446-0908c4b193f0
Zaluska, E J
43f6a989-9542-497e-bc9d-fe20f03cad35
Dubock, P A
7d05f246-288f-4d01-a446-0908c4b193f0
Zaluska, E J
43f6a989-9542-497e-bc9d-fe20f03cad35

Dubock, P A and Zaluska, E J (1973) Practical 2-dimensional bipolar-transistor-analysis algorithm. Electronics Letters, 9, 599-600.

Record type: Article

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Published date: 1973
Organisations: Web & Internet Science

Identifiers

Local EPrints ID: 253725
URI: https://eprints.soton.ac.uk/id/eprint/253725
ISSN: 0013-5194
PURE UUID: e853b871-0a34-4afc-8a5e-b6d2746b830f

Catalogue record

Date deposited: 27 Jul 2000
Last modified: 18 Jul 2017 09:56

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Contributors

Author: P A Dubock
Author: E J Zaluska

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