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Dynamic Memory Allocation in a VHDL Behavioural Synthesis System

Milton, D.J.D., Brown, A.D. and Williams, A.C. (2000) Dynamic Memory Allocation in a VHDL Behavioural Synthesis System , pp. 45-52.

Record type: Conference or Workshop Item (Other)


VHDL is capable of describing the dynamic allocation of memory resources at ?run-time?. This paper describes how this concept may be supported in a hardware synthesis environment. This requires a heap management system to be synthesised and implicitly accessed from within any user code, supporting the use of the VHDL access type. A method for controlling the storage of dynamic information (the heap manager) is reviewed. Issues such as timing and fragmentation are also discussed. An example of a design synthesised using the methods shown is reviewed last, which demonstrates the power of the technique.

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Published date: September 2000
Additional Information: Organisation: Forum on Design Languages 2000 (FDL 2000)
Organisations: EEE


Local EPrints ID: 254056
PURE UUID: ec28bf93-7ca9-4269-925f-b5a569d040b8

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Date deposited: 05 Jul 2001
Last modified: 18 Jul 2017 09:54

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Author: D.J.D. Milton
Author: A.D. Brown
Author: A.C. Williams

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