Milton, D.J.D., Brown, A.D. and Williams, A.C.
Dynamic Memory Allocation in a VHDL Behavioural Synthesis System
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VHDL is capable of describing the dynamic allocation of memory resources at ?run-time?. This paper describes how this concept may be supported in a hardware synthesis environment. This requires a heap management system to be synthesised and implicitly accessed from within any user code, supporting the use of the VHDL access type. A method for controlling the storage of dynamic information (the heap manager) is reviewed. Issues such as timing and fragmentation are also discussed. An example of a design synthesised using the methods shown is reviewed last, which demonstrates the power of the technique.
Conference or Workshop Item
||Organisation: Forum on Design Languages 2000 (FDL 2000)
||05 Jul 2001
||17 Apr 2017 23:19
|Further Information:||Google Scholar|
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