The University of Southampton
University of Southampton Institutional Repository

Power Constrained Test Scheduling Using Power Profile Manipulation, ISCAS 2001

Power Constrained Test Scheduling Using Power Profile Manipulation, ISCAS 2001
Power Constrained Test Scheduling Using Power Profile Manipulation, ISCAS 2001
This paper presents a novel power profile manipulation technique which reduces the testing time of the recently proposed power constrained test scheduling algorithms. The power profile manipulation technique consists of reordering and rotating test sequences and a new power approximation model. It is shown when the proposed power profile manipulation is integrated in power conscious test scheduling, savings up to 25% in testing time are achieved using benchmark circuits synthesized in AMS 0.35um technology.
251-254
Rosinger, Paul
b4dae52c-aeb6-4e07-8a63-d6deaae76ef2
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Nicolici, Nicola
61efa5a6-7da8-4c33-8e68-2679a9bb0871
Rosinger, Paul
b4dae52c-aeb6-4e07-8a63-d6deaae76ef2
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Nicolici, Nicola
61efa5a6-7da8-4c33-8e68-2679a9bb0871

Rosinger, Paul, Al-Hashimi, Bashir and Nicolici, Nicola (2001) Power Constrained Test Scheduling Using Power Profile Manipulation, ISCAS 2001 At Intl. Symposium on Circuits and Systems 2001. , pp. 251-254.

Record type: Conference or Workshop Item (Other)

Abstract

This paper presents a novel power profile manipulation technique which reduces the testing time of the recently proposed power constrained test scheduling algorithms. The power profile manipulation technique consists of reordering and rotating test sequences and a new power approximation model. It is shown when the proposed power profile manipulation is integrated in power conscious test scheduling, savings up to 25% in testing time are achieved using benchmark circuits synthesized in AMS 0.35um technology.

PDF iscas2001.pdf - Other
Download (65kB)

More information

Published date: September 2001
Additional Information: Organisation: IEEE
Venue - Dates: Intl. Symposium on Circuits and Systems 2001, 2001-09-01
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 254252
URI: http://eprints.soton.ac.uk/id/eprint/254252
PURE UUID: b3cb5869-260b-4141-b7a5-8960795914d0

Catalogue record

Date deposited: 22 May 2001
Last modified: 18 Jul 2017 09:53

Export record

Contributors

Author: Paul Rosinger
Author: Nicola Nicolici

University divisions

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of http://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×