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Automated synthesis of high-level VHDL-AMS analog descriptions

Automated synthesis of high-level VHDL-AMS analog descriptions
Automated synthesis of high-level VHDL-AMS analog descriptions
IEE
Asensi, G D
094bf733-f531-4ee3-b9ed-221d2afa5f28
Merino, R.R.
1b5c7599-0dd1-4cb8-b367-fe35f3a275fc
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a
Asensi, G D
094bf733-f531-4ee3-b9ed-221d2afa5f28
Merino, R.R.
1b5c7599-0dd1-4cb8-b367-fe35f3a275fc
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a

Asensi, G D, Merino, R.R. and Kazmierski, T J (2000) Automated synthesis of high-level VHDL-AMS analog descriptions.

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More information

Published date: December 2000
Additional Information: On-line Symposium for Electronic Engineers. Address: Savoy Place, London, WC2R 0BL
Organisations: EEE

Identifiers

Local EPrints ID: 255722
URI: http://eprints.soton.ac.uk/id/eprint/255722
PURE UUID: 2b6b7046-686a-4f14-ab03-3a7736971865

Catalogue record

Date deposited: 26 Apr 2002
Last modified: 10 Dec 2021 20:39

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Contributors

Author: G D Asensi
Author: R.R. Merino
Author: T J Kazmierski

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