Silicon on Insulator Power Integrated Circuits


Garner, D M, Udrea, F, Lim, H T, Ensell, G J, Popescu, A E, Sheng, K and Milne, W I (2000) Silicon on Insulator Power Integrated Circuits Microelectronics Journal, 32, (5-6), p. 517.

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Description/Abstract

A power integrated circuit process has been developed, based on silicon-on-insulator, which allows intelligent CMOS control circuitry to be placed alongside integrated high-voltage power devices. A breakdown voltage of 335 V has been obtained by using a silicon layer of 4 μm thickness together with a buried oxide layer of 3 μm thickness. The respective LDMOS specific on-resistance and LIGBT on-state voltage for this breakdown voltage were 148 mΩ cm2 and 3.9 V, respectively.

Item Type: Article
ISSNs: 0026-2692 (print)
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 255778
Date :
Date Event
2000Published
Date Deposited: 02 May 2001
Last Modified: 17 Apr 2017 23:14
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/255778

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