The University of Southampton
University of Southampton Institutional Repository

Silicon on Insulator Power Integrated Circuits

Garner, D M, Udrea, F, Lim, H T, Ensell, G J, Popescu, A E, Sheng, K and Milne, W I (2000) Silicon on Insulator Power Integrated Circuits Microelectronics Journal, 32, (5-6), p. 517.

Record type: Article


A power integrated circuit process has been developed, based on silicon-on-insulator, which allows intelligent CMOS control circuitry to be placed alongside integrated high-voltage power devices. A breakdown voltage of 335 V has been obtained by using a silicon layer of 4 μm thickness together with a buried oxide layer of 3 μm thickness. The respective LDMOS specific on-resistance and LIGBT on-state voltage for this breakdown voltage were 148 mΩ cm2 and 3.9 V, respectively.

Full text not available from this repository.

More information

Published date: 2000
Organisations: Nanoelectronics and Nanotechnology


Local EPrints ID: 255778
ISSN: 0026-2692
PURE UUID: e79a4c1d-04d7-40f7-a78f-98adfb1c98b3

Catalogue record

Date deposited: 02 May 2001
Last modified: 18 Jul 2017 09:51

Export record


Author: D M Garner
Author: F Udrea
Author: H T Lim
Author: G J Ensell
Author: A E Popescu
Author: K Sheng
Author: W I Milne

University divisions

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton:

ePrints Soton supports OAI 2.0 with a base URL of

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.