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Silicon on Insulator Power Integrated Circuits

Garner, D M, Udrea, F, Lim, H T, Ensell, G J, Popescu, A E, Sheng, K and Milne, W I (2000) Silicon on Insulator Power Integrated Circuits Microelectronics Journal, 32, (5-6), p. 517.

Record type: Article

Abstract

A power integrated circuit process has been developed, based on silicon-on-insulator, which allows intelligent CMOS control circuitry to be placed alongside integrated high-voltage power devices. A breakdown voltage of 335 V has been obtained by using a silicon layer of 4 μm thickness together with a buried oxide layer of 3 μm thickness. The respective LDMOS specific on-resistance and LIGBT on-state voltage for this breakdown voltage were 148 mΩ cm2 and 3.9 V, respectively.

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More information

Published date: 2000
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 255778
URI: http://eprints.soton.ac.uk/id/eprint/255778
ISSN: 0026-2692
PURE UUID: e79a4c1d-04d7-40f7-a78f-98adfb1c98b3

Catalogue record

Date deposited: 02 May 2001
Last modified: 18 Jul 2017 09:51

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Contributors

Author: D M Garner
Author: F Udrea
Author: H T Lim
Author: G J Ensell
Author: A E Popescu
Author: K Sheng
Author: W I Milne

University divisions

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