Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems
Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems
Dynamic voltage scaling (DVS) is a powerful technique to reduce power dissipation in embedded systems. Some efficient DVS algorithms have been recently proposed for the energy reduction in distributed system. However, they achieve the energy savings solely by scaling the system task with respect to the timing constraints, while neglecting that power varies among the tasks executed by DVS processing elements (DVS-PEs). In this paper we investigate the problem of considering DVS-PE power variations dependent on the executed tasks, during the synthesis of distributed embedded systems and its impact on the energy savings. Unlike previous approaches, which minimise the energy consumption by exploiting the available slack time without considering the PE power profiles, a new and fast heuristic for the voltage scaling problem is proposed, which improves the voltage selection for each task dependent on the individual power dissipation caused by that task. Experimental results show that energy reductions with up to 80.7% are achieved by integrating the proposed DVS algorithm, which considers the PE power profiles, into the co-synthesis of distributed systems.
1-58113-418-5
250-255
Schmitz, Marcus T
824cce4a-6528-4bd1-8357-3cfa637d20f1
Al-Hashimi, Bashir M
0b29c671-a6d2-459c-af68-c4614dce3b5d
October 2001
Schmitz, Marcus T
824cce4a-6528-4bd1-8357-3cfa637d20f1
Al-Hashimi, Bashir M
0b29c671-a6d2-459c-af68-c4614dce3b5d
Schmitz, Marcus T and Al-Hashimi, Bashir M
(2001)
Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems.
Proceedings of 14th International Symposium on System Synthesis.
.
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Conference or Workshop Item
(Paper)
Abstract
Dynamic voltage scaling (DVS) is a powerful technique to reduce power dissipation in embedded systems. Some efficient DVS algorithms have been recently proposed for the energy reduction in distributed system. However, they achieve the energy savings solely by scaling the system task with respect to the timing constraints, while neglecting that power varies among the tasks executed by DVS processing elements (DVS-PEs). In this paper we investigate the problem of considering DVS-PE power variations dependent on the executed tasks, during the synthesis of distributed embedded systems and its impact on the energy savings. Unlike previous approaches, which minimise the energy consumption by exploiting the available slack time without considering the PE power profiles, a new and fast heuristic for the voltage scaling problem is proposed, which improves the voltage selection for each task dependent on the individual power dissipation caused by that task. Experimental results show that energy reductions with up to 80.7% are achieved by integrating the proposed DVS algorithm, which considers the PE power profiles, into the co-synthesis of distributed systems.
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Published date: October 2001
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Organisation: IEEE
Venue - Dates:
Proceedings of 14th International Symposium on System Synthesis, 2001-10-01
Organisations:
Electronic & Software Systems
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Local EPrints ID: 255956
URI: http://eprints.soton.ac.uk/id/eprint/255956
ISBN: 1-58113-418-5
PURE UUID: 9d0e4ef6-8e7b-4f81-850b-b2f52ab3f958
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Date deposited: 06 Nov 2001
Last modified: 14 Mar 2024 05:36
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Contributors
Author:
Marcus T Schmitz
Author:
Bashir M Al-Hashimi
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