Effective mobilities in pseudomorphic Si/SiGe/ p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers
Effective mobilities in pseudomorphic Si/SiGe/ p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers
The room-temperature effective mobilities of pseudomorphic Si/Si 0.64 Ge 0.36/Si p-metal-oxide-semiconductor field effect transistors are reported. The peak mobility in the buried Si/Ge channel increases with silicon cap thickness. It is argued that SiO2/Si interface roughness is a major source of scattering in these devices, which is attenuated for thicker silicon caps. It is also suggested that segregated Ge in the silicon cap interferes with the oxidation process, leading to increased SiO2/Si interface roughness in the case of thin silicon caps.
Palmer, M. J.
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Braithwaite, G.
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Grasby, T. J.
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Phillips, P. J.
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Prest, M. J.
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Parker, E. H. C.
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Whall, T. E.
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Parry, C. P.
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Waite, A. M.
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Evans, A. G. R.
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Roy, S.
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Watling, J. R.
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Kaya, S.
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Asenov, A.
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March 2001
Palmer, M. J.
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Braithwaite, G.
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Grasby, T. J.
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Phillips, P. J.
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Prest, M. J.
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Parker, E. H. C.
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Whall, T. E.
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Parry, C. P.
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Waite, A. M.
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Evans, A. G. R.
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Roy, S.
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Watling, J. R.
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Kaya, S.
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Asenov, A.
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Palmer, M. J., Braithwaite, G., Grasby, T. J., Phillips, P. J., Prest, M. J., Parker, E. H. C., Whall, T. E., Parry, C. P., Waite, A. M., Evans, A. G. R., Roy, S., Watling, J. R., Kaya, S. and Asenov, A.
(2001)
Effective mobilities in pseudomorphic Si/SiGe/ p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers.
Abstract
The room-temperature effective mobilities of pseudomorphic Si/Si 0.64 Ge 0.36/Si p-metal-oxide-semiconductor field effect transistors are reported. The peak mobility in the buried Si/Ge channel increases with silicon cap thickness. It is argued that SiO2/Si interface roughness is a major source of scattering in these devices, which is attenuated for thicker silicon caps. It is also suggested that segregated Ge in the silicon cap interferes with the oxidation process, leading to increased SiO2/Si interface roughness in the case of thin silicon caps.
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Published date: March 2001
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 256170
URI: http://eprints.soton.ac.uk/id/eprint/256170
PURE UUID: 50a33790-8ad1-4863-a697-b6761b58e9ca
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Date deposited: 11 Dec 2001
Last modified: 10 Dec 2021 20:42
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Contributors
Author:
M. J. Palmer
Author:
G. Braithwaite
Author:
T. J. Grasby
Author:
P. J. Phillips
Author:
M. J. Prest
Author:
E. H. C. Parker
Author:
T. E. Whall
Author:
C. P. Parry
Author:
A. M. Waite
Author:
A. G. R. Evans
Author:
S. Roy
Author:
J. R. Watling
Author:
S. Kaya
Author:
A. Asenov
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