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Path testing of MOS circuits

Path testing of MOS circuits
Path testing of MOS circuits
11.1-11.5
Damper, R. I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6
Damper, R. I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6

Damper, R. I. and Burgess, N. (1985) Path testing of MOS circuits. IEE Colloquium on Design for Testability. 11.1-11.5 .

Record type: Conference or Workshop Item (Other)

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More information

Published date: 1985
Additional Information: Address: London, UK
Venue - Dates: IEE Colloquium on Design for Testability, 1985-01-01
Organisations: Southampton Wireless Group

Identifiers

Local EPrints ID: 256254
URI: http://eprints.soton.ac.uk/id/eprint/256254
PURE UUID: 12785d94-394a-4de4-9ac5-9df74bc5d509

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Date deposited: 07 Jan 2002
Last modified: 10 Dec 2021 20:42

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Contributors

Author: R. I. Damper
Author: N. Burgess

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