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An integrated framework for digital electronics education - programmable logic and IC design tools

Forcer, T M, Nixon, M S and Zwolinski, M (2002) An integrated framework for digital electronics education - programmable logic and IC design tools At Engineering Education 2002 - Professional Engineering Scenarios. , 37/1-37/6.

Record type: Conference or Workshop Item (Other)


Digital electronics is core curriculum in electronics and electrical engineering degrees. Programmable logic has now become its dominant implementation technology. We describe an integrated framework of practical work to support conventional (taught) design material, at all stages of an undergraduate degree course. Logic gate functions and state machines are first illustrated with demonstration units based on Programmable Logic Devices (PLDs). Students then use ABEL - a simple HDL (Hardware Description Language) - to implement a series of designs based around counters and state machines. A design exercise early in the second year requires students to use VHDL (VHSIC Hardware Description Language) to control a model lift with a simple FPGA (Field Programmable Gate Array), extending programmable implementation as well as programming language. Later work in the second year includes intensive team design projects involving programmable logic, and the design and test of a CMOS Gate Array system. All students therefore acquire transferable HDL skills. These can be developed further in the third year individual design project, where a range of HDL systems is available and it is easier to provide relatively expensive software for the limited numbers concerned. PLD programming is supported in two distinct ways. Conventional stand-alone programming stations provide for EPROMs and many PLDs, while in-system programming of standard architectures avoids bottlenecks in whole-class exercises. Hence, students are exposed to appropriate implementation technology in a manner suited to each level of their degree programme, to prime them well with transferable skills for their professional engineering careers.

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Published date: January 2002
Additional Information: Symposium Proceedings Organisation: IEE Address: Savoy Place, London WC2R 0BL
Venue - Dates: Engineering Education 2002 - Professional Engineering Scenarios, 2002-01-01
Organisations: EEE, Southampton Wireless Group


Local EPrints ID: 256386
PURE UUID: 1b2f7e90-599d-4be7-94ca-14797e83c97d
ORCID for M Zwolinski: ORCID iD

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Date deposited: 19 Mar 2002
Last modified: 18 Jul 2017 09:47

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Author: T M Forcer
Author: M S Nixon
Author: M Zwolinski ORCID iD

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