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Speed-up Techniques for Fault-based Analogue Fault Simulation

Speed-up Techniques for Fault-based Analogue Fault Simulation
Speed-up Techniques for Fault-based Analogue Fault Simulation
Kilic, Y.
47444b82-52f5-48e8-b219-01009e81e0ea
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Kilic, Y.
47444b82-52f5-48e8-b219-01009e81e0ea
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0

Kilic, Y. and Zwolinski, M. (2001) Speed-up Techniques for Fault-based Analogue Fault Simulation. Proceedings of ETW'01.

Record type: Conference or Workshop Item (Other)

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More information

Published date: May 2001
Additional Information: CD-ROM.
Venue - Dates: Proceedings of ETW'01, 2001-04-30
Organisations: EEE

Identifiers

Local EPrints ID: 256546
URI: http://eprints.soton.ac.uk/id/eprint/256546
PURE UUID: 70bcfded-e211-48c1-8f8d-cb11b428e18d
ORCID for M. Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 01 May 2002
Last modified: 11 Dec 2021 02:43

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Contributors

Author: Y. Kilic
Author: M. Zwolinski ORCID iD

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