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Useless Memory Allocation: Problems and Solutions

Gonciari, Paul Theo, Al-Hashimi, Bashir and Nicolici, Nicola (2002) Useless Memory Allocation: Problems and Solutions At Proceedings IEEE VLSI Test Symposium (VTS). , pp. 423-430.

Record type: Conference or Workshop Item (Other)


Unlike the existing research direction that focuses on useful test data reduction, this paper analyzes the useless test data memory requirements for system-on-a-chip test. The proposed solution to minimize the useless test memory is based on a new test methodology which combines a novel core wrapper design algorithm with a new test vector deployment procedure stored in the automatic test equipment (ATE). To reduce memory requirements, the proposed core wrapper design finds the minimum number of wrapper scan chain partitions such that the useless memory allocation is minimized in each partition, which facilitates efficient usage of ATE capabilities. Further, the new test vector deployment procedure provides a seamless integration with the ATE. When compared to the previously proposed core wrapper design algorithms, the proposed test methodology reduces the memory requirements up to 45%, without any penalties in test area overhead.

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Published date: April 2002
Additional Information: Address: Monterey, CA
Venue - Dates: Proceedings IEEE VLSI Test Symposium (VTS), 2002-04-01
Organisations: Electronic & Software Systems


Local EPrints ID: 256772
PURE UUID: 10a8a28b-d28e-4bc7-bc1c-dc15afc49d50

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Date deposited: 27 Sep 2002
Last modified: 18 Jul 2017 09:44

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Author: Paul Theo Gonciari
Author: Nicola Nicolici

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