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Reducing Synchronization Overhead in Test Data Compression Environments

Gonciari, Paul Theo, Al-Hashimi, Bashir and Nicolici, Nicola (2002) Reducing Synchronization Overhead in Test Data Compression Environments At Proceedings IEEE European Test Workshop (ETW).

Record type: Conference or Workshop Item (Other)


Synchronization overhead between the core under test and the automatic test equipment is the main drawback of test data compression/decompression environments, which hinders the deployment of this new embedded test technology. This paper introduces two new methods to reduce the synchronization overhead. Firstly, the synchronization overhead is reduced by tailoring the compressed test set and not the compression method as proposed by previous approaches. It is shown, by means of experimental data, that the proposed method obtains similar or smaller test sets, without modifying the on-chip decoder, thus facilitating the reuse of the existing hardware infrastructure. Secondly, to provide a full scenario for testing complex systems-on-a-chip with multiple embedded cores, a new distribution architecture is introduced. The architecture exploits the features of parallel on-chip decoders and, in contrast to the interleaving architecture recently proposed, no changes to the on-chip decoders are required. In addition to reusing the existing decoders the distinctive features of the proposed architecture are scalability and programmability, which ease the integration into any existing design and test flow.

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Published date: May 2002
Additional Information: Address: Corfu, Greece
Venue - Dates: Proceedings IEEE European Test Workshop (ETW), 2002-05-01
Organisations: Electronic & Software Systems


Local EPrints ID: 256773
PURE UUID: 2b9df3d0-3830-4d10-8561-b98ba0f3f0e1

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Date deposited: 27 Sep 2002
Last modified: 18 Jul 2017 09:44

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Author: Paul Theo Gonciari
Author: Nicola Nicolici

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