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Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages

Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages
Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages
The use of behavioural modelling for operational amplifiers has been well known for many years and previous work has included modelling of specific fault conditions using a macro-model. In this paper, the models are implemented in a more abstract form using analogue Hardware Description Languages (HDLs), including MAST, taking advantage of the ability to control the behaviour of the model using high-level fault condition states. The implementation method allows a range of fault conditions to be integrated without switching to a completely new model. The various transistor faults are categorised, and used to characterise the behaviour of the HDL models. Simulations compare the accuracy and speed of the transistor and behavioural level models under a set of representative fault conditions.
Wilson, P R
8a65c092-c197-4f43-b8fc-e12977783cb3
Kilic, Y
18a56bab-203e-43d0-af64-7e4c18f23ac6
Ross, J N
c1a15701-d60d-4c32-8193-680386774a88
Zwolinski, M
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Brown, A D
5c19e523-65ec-499b-9e7c-91522017d7e0
Wilson, P R
8a65c092-c197-4f43-b8fc-e12977783cb3
Kilic, Y
18a56bab-203e-43d0-af64-7e4c18f23ac6
Ross, J N
c1a15701-d60d-4c32-8193-680386774a88
Zwolinski, M
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Brown, A D
5c19e523-65ec-499b-9e7c-91522017d7e0

Wilson, P R, Kilic, Y, Ross, J N, Zwolinski, M and Brown, A D (2001) Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages At Behavioral Modeling and Simulation Workshop.

Record type: Conference or Workshop Item (Paper)

Abstract

The use of behavioural modelling for operational amplifiers has been well known for many years and previous work has included modelling of specific fault conditions using a macro-model. In this paper, the models are implemented in a more abstract form using analogue Hardware Description Languages (HDLs), including MAST, taking advantage of the ability to control the behaviour of the model using high-level fault condition states. The implementation method allows a range of fault conditions to be integrated without switching to a completely new model. The various transistor faults are categorised, and used to characterise the behaviour of the HDL models. Simulations compare the accuracy and speed of the transistor and behavioural level models under a set of representative fault conditions.

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More information

Published date: 2001
Additional Information: CD-ROM. Organisation: IEEE/ACM
Venue - Dates: Behavioral Modeling and Simulation Workshop, 2001-01-01
Organisations: EEE

Identifiers

Local EPrints ID: 257348
URI: http://eprints.soton.ac.uk/id/eprint/257348
PURE UUID: ab531f9e-37cb-41d6-9aee-e785a2087282
ORCID for M Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 06 May 2003
Last modified: 18 Jul 2017 09:39

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Contributors

Author: P R Wilson
Author: Y Kilic
Author: J N Ross
Author: M Zwolinski ORCID iD
Author: A D Brown

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