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Enhanced p-MOSFET performance using strained-Si on SiGe virtual substrates grown by low energy plasma enhanced chemical vapor deposition

Enhanced p-MOSFET performance using strained-Si on SiGe virtual substrates grown by low energy plasma enhanced chemical vapor deposition
Enhanced p-MOSFET performance using strained-Si on SiGe virtual substrates grown by low energy plasma enhanced chemical vapor deposition
Enhancements of up to 100% in transconductance, mobility and on-current performance are demonstrated for p-MOSFET devices using strained-Si on virtual substrates of Si0.85Ge0.15 and Si0.8Ge0.2 compared to standard bulk silicon devices. A standard 0.25 µm high-thermal budget process has been used without any significant compromise of the off-state or sub-threshold characteristics. A low energy plasma enhanced chemical vapor deposition system was used to grow a thick strain-relaxation buffer in under 15 minutes before solid source MBE grew the top strained-Si layers. Strained-Si layers were grown and processed without any additional chemical mechanical polishing before device processing. The results on a relaxed technology node process suggest that strained-Si layers may be used to enhance the performance by at least one technology generation without retooling. Index terms: CMOS, pMOSFETs, strained-Si, SiGe, thermal budget, drain current enhancements, transconductance enhancements, virtual substrate.
Temple, M.P.
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Paul, D.J.
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Tang, Y.T.
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Waite, A.M.
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Cerrina, C
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Evans, A.G.R.
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Grasby, T.J.
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Parker, E.H.C.
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von Känel, H
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O’Neill, A.G
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Temple, M.P.
942d4f51-ca6a-4e78-96c4-bd4f142f7e10
Paul, D.J.
d16dbdf8-e83a-4629-810b-dd877ce34e34
Tang, Y.T.
e944297b-6a69-4f74-9d6d-59f0751b3975
Waite, A.M.
3badd40f-fa77-443f-8c8c-baede8a20dbd
Cerrina, C
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Evans, A.G.R.
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Grasby, T.J.
ce4f2809-5ff2-4778-8da4-ad9c89558e1c
Parker, E.H.C.
fdf805ea-a786-4ce0-bef5-9172c9c062b9
von Känel, H
2d8a16cf-f453-4797-a262-af94daa9f517
O’Neill, A.G
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Temple, M.P., Paul, D.J., Tang, Y.T., Waite, A.M., Cerrina, C, Evans, A.G.R., Grasby, T.J., Parker, E.H.C., von Känel, H and O’Neill, A.G (2005) Enhanced p-MOSFET performance using strained-Si on SiGe virtual substrates grown by low energy plasma enhanced chemical vapor deposition. IEEE Transactions on Electron Devices.

Record type: Article

Abstract

Enhancements of up to 100% in transconductance, mobility and on-current performance are demonstrated for p-MOSFET devices using strained-Si on virtual substrates of Si0.85Ge0.15 and Si0.8Ge0.2 compared to standard bulk silicon devices. A standard 0.25 µm high-thermal budget process has been used without any significant compromise of the off-state or sub-threshold characteristics. A low energy plasma enhanced chemical vapor deposition system was used to grow a thick strain-relaxation buffer in under 15 minutes before solid source MBE grew the top strained-Si layers. Strained-Si layers were grown and processed without any additional chemical mechanical polishing before device processing. The results on a relaxed technology node process suggest that strained-Si layers may be used to enhance the performance by at least one technology generation without retooling. Index terms: CMOS, pMOSFETs, strained-Si, SiGe, thermal budget, drain current enhancements, transconductance enhancements, virtual substrate.

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Published date: 2005
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 258988
URI: https://eprints.soton.ac.uk/id/eprint/258988
PURE UUID: b2c3ab90-0714-4b7d-999c-b0e489bd5c11

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Date deposited: 02 Mar 2005
Last modified: 24 Oct 2017 16:31

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