Co-Synthesis of Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities
Co-Synthesis of Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities
We present a novel co-design methodology for the synthesis of energy-efficient embedded systems. In particular, we concentrate on distributed embedded systems that accommodate several different applications within a single device, i.e., multimode embedded systems. Based on the key observation that operational modes are executed with different probabilities, that is, the system spends uneven amounts of time in the different modes, we develop a new co-design technique that exploits this property to significantly reduce energy dissipation. Energy and cost savings are achieved through a suitable synthesis process that yields better hardware-resource-sharing opportunities. We conduct several experiments, including a realistic smart phone example, that demonstrate the effectiveness of our approach. Reductions in power consumption of up to 64% are reported.
Low power system level design, HW/SW co-design, dynamic voltage scaling
153-169
Schmitz T., Marcus
2fa009c9-58d0-4692-ba13-fa827dee570f
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Eles, Petru
ff663918-4c91-4774-a196-06d87393323f
February 2005
Schmitz T., Marcus
2fa009c9-58d0-4692-ba13-fa827dee570f
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Eles, Petru
ff663918-4c91-4774-a196-06d87393323f
Schmitz T., Marcus, Al-Hashimi, Bashir M. and Eles, Petru
(2005)
Co-Synthesis of Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24 (2), .
Abstract
We present a novel co-design methodology for the synthesis of energy-efficient embedded systems. In particular, we concentrate on distributed embedded systems that accommodate several different applications within a single device, i.e., multimode embedded systems. Based on the key observation that operational modes are executed with different probabilities, that is, the system spends uneven amounts of time in the different modes, we develop a new co-design technique that exploits this property to significantly reduce energy dissipation. Energy and cost savings are achieved through a suitable synthesis process that yields better hardware-resource-sharing opportunities. We conduct several experiments, including a realistic smart phone example, that demonstrate the effectiveness of our approach. Reductions in power consumption of up to 64% are reported.
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More information
Published date: February 2005
Keywords:
Low power system level design, HW/SW co-design, dynamic voltage scaling
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 259221
URI: http://eprints.soton.ac.uk/id/eprint/259221
ISSN: 0278-0070
PURE UUID: 4a4bccab-17b4-43e6-9adf-0c972195e28e
Catalogue record
Date deposited: 23 Mar 2004
Last modified: 14 Mar 2024 06:21
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Contributors
Author:
Marcus Schmitz T.
Author:
Bashir M. Al-Hashimi
Author:
Petru Eles
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