Xilinx FPGA Reconfiguration using JTAG
Xilinx FPGA Reconfiguration using JTAG
For some time, Xilinx FPGAs have included a facility to be configured and re-configured using a JTAG port. There is no application note or other manufacturer's documentation defining the method to be used to achieve this. We have established a straightforward scheme allowing VHDL designs to be configured via JTAG. Example source code is shown.
Xilinx FPGA JTAG reconfiguration VHDL
Forcer, Tim
47eaa531-aed6-46cc-8975-55f05802a81e
2002
Forcer, Tim
47eaa531-aed6-46cc-8975-55f05802a81e
Forcer, Tim
(2002)
Xilinx FPGA Reconfiguration using JTAG.
EEUG Workshop on Research, Application and Future Prospects in Educational ECAD of Programmable Logic Arrays, Buckinghamshire Chilterns University College.
03 - 04 Sep 2002.
Record type:
Conference or Workshop Item
(Poster)
Abstract
For some time, Xilinx FPGAs have included a facility to be configured and re-configured using a JTAG port. There is no application note or other manufacturer's documentation defining the method to be used to achieve this. We have established a straightforward scheme allowing VHDL designs to be configured via JTAG. Example source code is shown.
More information
Published date: 2002
Additional Information:
Event Dates: 2002 September 3&4
Venue - Dates:
EEUG Workshop on Research, Application and Future Prospects in Educational ECAD of Programmable Logic Arrays, Buckinghamshire Chilterns University College, 2002-09-03 - 2002-09-04
Keywords:
Xilinx FPGA JTAG reconfiguration VHDL
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 259465
URI: http://eprints.soton.ac.uk/id/eprint/259465
PURE UUID: bb59d49f-553a-4bf0-90fc-ff9b382b6148
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Date deposited: 16 Jun 2004
Last modified: 14 Mar 2024 06:23
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Contributors
Author:
Tim Forcer
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