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A stochastic neural architecture that exploits dynamically reconfigurable FPGAs

Daalen, M., Jeavons, P. and Shawe-Taylor, John (1993) A stochastic neural architecture that exploits dynamically reconfigurable FPGAs In Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines. IEEE Computer Society Press., pp. 202-211.

Record type: Conference or Workshop Item (Paper)

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Published date: 1993
Organisations: Electronics & Computer Science

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Local EPrints ID: 259700
URI: http://eprints.soton.ac.uk/id/eprint/259700
ISBN: 0818638907
PURE UUID: 0b0419f9-3a32-4823-929f-aea927b71d88

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Date deposited: 11 Aug 2004
Last modified: 18 Jul 2017 09:20

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Contributors

Author: M. Daalen
Author: P. Jeavons
Author: John Shawe-Taylor

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