Probabilistic Bit Stream Neural Chip: Implementation
Probabilistic Bit Stream Neural Chip: Implementation
0-306-44029-6
285-294
Plenum Publishing Corporation
Daalen, Max Van
50001aca-d291-460d-8c5c-a2ec57cf5482
Jeavons, Peter
ef82bfe9-08c4-4934-8da5-8902996e58cf
Shawe-Taylor, John
b1931d97-fdd0-4bc1-89bc-ec01648e928b
1991
Daalen, Max Van
50001aca-d291-460d-8c5c-a2ec57cf5482
Jeavons, Peter
ef82bfe9-08c4-4934-8da5-8902996e58cf
Shawe-Taylor, John
b1931d97-fdd0-4bc1-89bc-ec01648e928b
Daalen, Max Van, Jeavons, Peter and Shawe-Taylor, John
(1991)
Probabilistic Bit Stream Neural Chip: Implementation.
In,
Oxford Workshop on VLSI for Artificial Intelligence and Neural Networks September 1990.
Plenum Publishing Corporation, .
Record type:
Book Section
This record has no associated files available for download.
More information
Published date: 1991
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 259736
URI: http://eprints.soton.ac.uk/id/eprint/259736
ISBN: 0-306-44029-6
PURE UUID: 2b101c9c-f3c2-49d8-9b71-fbb9b339878d
Catalogue record
Date deposited: 12 Aug 2004
Last modified: 09 Apr 2024 22:04
Export record
Contributors
Author:
Max Van Daalen
Author:
Peter Jeavons
Author:
John Shawe-Taylor
Download statistics
Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.
View more statistics