Brown, AD and Zwolinski, M
Behavioural modelling of analogue faults in VHDL-AMS - A case study
At 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Canada.
23 - 26 May 2004.
Analogue fault simulation is needed to evaluate the quality of tests, but is very computationally intensive. Behavioural simulation is more abstract and thus faster than fault simulation. Using a phase-locked loop as a case study, we show how behavioural fault models can be derived from transistor-level fault simulations and that faulty behaviour can be accurately modeled.
Conference or Workshop Item
||Event Dates: MAY 23-26, 2004
|Venue - Dates:
||2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Canada, 2004-05-23 - 2004-05-26
||fault simulation hardware description languages integrated circuit modelling mixed analogue-digital integrated circuits phase locked loops VHDL-AMS analogue fault simulation behavioural analogue fault modelling behavioural fault models behavioural simulation faulty behaviour modelling intensive computation phase-locked loop transistor-level fault simulation
||27 Jan 2005
||17 Apr 2017 22:15
|Further Information:||Google Scholar|
Actions (login required)