Wilcock, Reuben, Wilson, Peter R. and Al-Hashimi, Bashir
A Novel Switch-Current Phase Locked Loop
At ISCAS 2005, Japan.
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This paper investigates the design of phase locked loops (PLLs) using the switched current (SI) technique and proposes a novel 2nd order PLL architecture that does not require an explicit phase detector, unlike conventional PLL circuits. Simulated results based on 0.35?m BSim3v3 CMOS models of two PLL designs (10MHz FSK demodulator, 500MHz frequency synthesizer) are included.
Conference or Workshop Item
||Event Dates: May 2005
|Venue - Dates:
||ISCAS 2005, Japan, 2005-05-01
||Electronic & Software Systems, EEE
||28 Jan 2005
||17 Apr 2017 22:14
|Further Information:||Google Scholar|
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