Impact of Multicycled Scheduling on Power-Area Tradeoffs in Behavioural Synthesis
Impact of Multicycled Scheduling on Power-Area Tradeoffs in Behavioural Synthesis
Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the aim of increasing the performance and/or minimising the power consumption. This paper presents a new time-constrained scheduling (TCS) algorithm that takes into account the combined influence of clock period and the multicycled functional units execution time on the quality of the schedules in terms of power and area. It is shown that it is possible to produce a set of solutions that have similar power consumptions, however differ in terms of resource requirements, yet meeting the imposed real-time constraint. Furthermore, extensive experiments on behavioural benchmarks show that the proposed approach is capable of obtaining schedules with single supply domain that have identical resource requirements and comparable power consumption to schedules obtained using multiple supply voltages, further reducing the design complexity.
Ochoa-Montiel, M A
8e20a11b-d241-479d-9624-ad01e40f567d
Al-Hashimi, B M
0b29c671-a6d2-459c-af68-c4614dce3b5d
Kollig, P
2b4abc6f-4e33-4367-bb4f-2bd86e7a7891
2005
Ochoa-Montiel, M A
8e20a11b-d241-479d-9624-ad01e40f567d
Al-Hashimi, B M
0b29c671-a6d2-459c-af68-c4614dce3b5d
Kollig, P
2b4abc6f-4e33-4367-bb4f-2bd86e7a7891
Ochoa-Montiel, M A, Al-Hashimi, B M and Kollig, P
(2005)
Impact of Multicycled Scheduling on Power-Area Tradeoffs in Behavioural Synthesis.
2005 IEEE International Symposium on Circuits and Systems (ISCAS), Kobe, Japan.
23 - 26 May 2005.
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Abstract
Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the aim of increasing the performance and/or minimising the power consumption. This paper presents a new time-constrained scheduling (TCS) algorithm that takes into account the combined influence of clock period and the multicycled functional units execution time on the quality of the schedules in terms of power and area. It is shown that it is possible to produce a set of solutions that have similar power consumptions, however differ in terms of resource requirements, yet meeting the imposed real-time constraint. Furthermore, extensive experiments on behavioural benchmarks show that the proposed approach is capable of obtaining schedules with single supply domain that have identical resource requirements and comparable power consumption to schedules obtained using multiple supply voltages, further reducing the design complexity.
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Published date: 2005
Additional Information:
Event Dates: 23/05/2005 - 26/05/2005
Venue - Dates:
2005 IEEE International Symposium on Circuits and Systems (ISCAS), Kobe, Japan, 2005-05-23 - 2005-05-26
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 260442
URI: http://eprints.soton.ac.uk/id/eprint/260442
PURE UUID: e99ed4ad-f358-4156-8c24-085d270d9dde
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Date deposited: 04 Feb 2005
Last modified: 14 Mar 2024 06:38
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Contributors
Author:
M A Ochoa-Montiel
Author:
B M Al-Hashimi
Author:
P Kollig
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