A Continuous-time Hierarchical Field Programmable Analogue Array for Rapid Prototyping and Hierarchical Approach to Analogue Systems Design
A Continuous-time Hierarchical Field Programmable Analogue Array for Rapid Prototyping and Hierarchical Approach to Analogue Systems Design
This paper presents our continuous-time Hierarchical Field Programmable Analogue Array (HFPAA) designed as a result of our research efforts to enable rapid prototyping for analogue system design. Here, we present our continuous-time configurable analogue block (CAB) used for our HFPAA, with increased flexibility in facilitating a hierarchical approach to analogue design and also in configuring target applications. This is achieved by minimising the dependence of our CAB on external passive components and with our hierarchical structure formed by “clustering” these CABs. On the basis of results from our first prototype HFPAA fabricated in AMS 0.6?m CMOS process, we also present our methodology of establishing the relationship between the routability of our HFPAA and the flexibility of its interconnection structures. The analysis of the hierarchical interconnection structure is performed using our algorithm we introduce here, as we believe there has been no prior work/methodology established for an HFPAA. Our algorithm for interconnectivity analysis of our HFPAA, is presented here. Work to date has established our design methodology and feasibility of our hierarchical approach to analogue system design.
VARGHESE, D
921d2ba0-7ec0-45ba-9d35-8a503a148a7a
ROSS, JN
0a5fe4de-ef4a-44aa-a4ff-0e985cde44c8
2005
VARGHESE, D
921d2ba0-7ec0-45ba-9d35-8a503a148a7a
ROSS, JN
0a5fe4de-ef4a-44aa-a4ff-0e985cde44c8
VARGHESE, D and ROSS, JN
(2005)
A Continuous-time Hierarchical Field Programmable Analogue Array for Rapid Prototyping and Hierarchical Approach to Analogue Systems Design.
ACM 18th Symposium on Integrated Circuits and Systems Design (SBCCI 2005), Florian´opolis, Brazil.
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Abstract
This paper presents our continuous-time Hierarchical Field Programmable Analogue Array (HFPAA) designed as a result of our research efforts to enable rapid prototyping for analogue system design. Here, we present our continuous-time configurable analogue block (CAB) used for our HFPAA, with increased flexibility in facilitating a hierarchical approach to analogue design and also in configuring target applications. This is achieved by minimising the dependence of our CAB on external passive components and with our hierarchical structure formed by “clustering” these CABs. On the basis of results from our first prototype HFPAA fabricated in AMS 0.6?m CMOS process, we also present our methodology of establishing the relationship between the routability of our HFPAA and the flexibility of its interconnection structures. The analysis of the hierarchical interconnection structure is performed using our algorithm we introduce here, as we believe there has been no prior work/methodology established for an HFPAA. Our algorithm for interconnectivity analysis of our HFPAA, is presented here. Work to date has established our design methodology and feasibility of our hierarchical approach to analogue system design.
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Published date: 2005
Venue - Dates:
ACM 18th Symposium on Integrated Circuits and Systems Design (SBCCI 2005), Florian´opolis, Brazil, 2005-01-01
Organisations:
Electronics & Computer Science
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Local EPrints ID: 261021
URI: http://eprints.soton.ac.uk/id/eprint/261021
PURE UUID: d307ba99-c150-474d-8999-356b81c6352a
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Date deposited: 28 Jun 2005
Last modified: 08 Jan 2022 11:49
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Author:
D VARGHESE
Author:
JN ROSS
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