Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling
Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling
Recently we have shown how hot-spots during test can be avoided without unnecessarily increasing the testing time by using a thermal-safe test scheduling approach. In this work, we investigate the impact of scan shift frequency scaling on the thermal-safe test scheduling performance and propose an algorithm which embeds shift frequency scaling into the test scheduling process. Experimental results show that this approach offers shorter overall testing times and significantly improved ability of meeting tight thermal constraints when compared to existing thermal-safe test scheduling approach based on a fixed scan shift frequency.
Tafaj, Enkelejda
fc9bf76e-bc95-466c-9249-f9798707906a
Rosinger, Paul
b4dae52c-aeb6-4e07-8a63-d6deaae76ef2
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Chakrabarty, Krisnendu
d1cffef8-84e5-42f8-9e99-e13e8fa4b78e
2005
Tafaj, Enkelejda
fc9bf76e-bc95-466c-9249-f9798707906a
Rosinger, Paul
b4dae52c-aeb6-4e07-8a63-d6deaae76ef2
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Chakrabarty, Krisnendu
d1cffef8-84e5-42f8-9e99-e13e8fa4b78e
Tafaj, Enkelejda, Rosinger, Paul, Al-Hashimi, Bashir and Chakrabarty, Krisnendu
(2005)
Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling.
International Symposium on Defect and Fault Tolerance in VLSI Systems, Monterey, CA.
03 - 05 Oct 2005.
Record type:
Conference or Workshop Item
(Paper)
Abstract
Recently we have shown how hot-spots during test can be avoided without unnecessarily increasing the testing time by using a thermal-safe test scheduling approach. In this work, we investigate the impact of scan shift frequency scaling on the thermal-safe test scheduling performance and propose an algorithm which embeds shift frequency scaling into the test scheduling process. Experimental results show that this approach offers shorter overall testing times and significantly improved ability of meeting tight thermal constraints when compared to existing thermal-safe test scheduling approach based on a fixed scan shift frequency.
More information
Published date: 2005
Additional Information:
Event Dates: 3-5 October
Venue - Dates:
International Symposium on Defect and Fault Tolerance in VLSI Systems, Monterey, CA, 2005-10-03 - 2005-10-05
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 261102
URI: http://eprints.soton.ac.uk/id/eprint/261102
PURE UUID: 44e104ac-514b-47c9-9cc5-0d65a1704a1e
Catalogue record
Date deposited: 02 Aug 2005
Last modified: 14 Mar 2024 06:47
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Contributors
Author:
Enkelejda Tafaj
Author:
Paul Rosinger
Author:
Bashir Al-Hashimi
Author:
Krisnendu Chakrabarty
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