Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling


Tafaj, Enkelejda, Rosinger, Paul, Al-Hashimi, Bashir and Chakrabarty, Krisnendu (2005) Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling At International Symposium on Defect and Fault Tolerance in VLSI Systems. 03 - 05 Oct 2005.

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Description/Abstract

Recently we have shown how hot-spots during test can be avoided without unnecessarily increasing the testing time by using a thermal-safe test scheduling approach. In this work, we investigate the impact of scan shift frequency scaling on the thermal-safe test scheduling performance and propose an algorithm which embeds shift frequency scaling into the test scheduling process. Experimental results show that this approach offers shorter overall testing times and significantly improved ability of meeting tight thermal constraints when compared to existing thermal-safe test scheduling approach based on a fixed scan shift frequency.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Event Dates: 3-5 October
Venue - Dates: International Symposium on Defect and Fault Tolerance in VLSI Systems, 2005-10-03 - 2005-10-05
Organisations: Electronic & Software Systems
ePrint ID: 261102
Date :
Date Event
2005Published
Date Deposited: 02 Aug 2005
Last Modified: 17 Apr 2017 22:02
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/261102

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