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Review of SiGe HBTs on SOI

Review of SiGe HBTs on SOI
Review of SiGe HBTs on SOI
This paper reviews progress in SiGe Heterojunction Bipolar Transistors (HBT) on Silicon-On-Insulator (SOI) technology. SiGe HBTs on SOI are attractive for mixed signal radio frequency (RF) applications and have been of increasing research interest due to their compatibility with SOI CMOS (Complementary Metal Oxide Semiconductor) technology. In bipolar technology, the use of SOI substrate eliminates parasitic substrate transistors and associated latch-up, and has the ability to reduce crosstalk, particularly when combined with buried groundplanes (GP). Various technological SOI bipolar concepts are reviewed with special emphasis on the state-of-the-art SOI SiGe HBT devices in vertical and lateral design. More in depth results are shown from a UK consortium advanced RF platform technology, which includes SOI SiGe HBTs. Bonded wafer technology was developed to allow incorporation of buried silicide layers both above and below the buried oxide. New electrical and noise characterisation results pointed to reduced 1/f noise in these devices compared to bulk counterparts. The lower noise is purported to arise from strain relief of the device structure due to the elasticity of the buried oxide layer during the high temperature epitaxial layer growth. The novel concept of the silicide SOI (SSOI) SiGe HBT technology developed for targeting a reduction in collector resistance, as well as for suppressing the crosstalk, is outlined. The buried tungsten silicide layers were found to have negligible impact on junction leakage. Further to vertical SiGe HBTs on SOI, the challenges of fabricating a lateral SOI SiGe HBT structure are presented.
0038-1101
1556-1567
Mitrovic, I.Z.
a1d3f694-b084-42b4-ac61-25a540be3e64
Buiu, O.
a994b22e-018b-4355-abd5-0227724f2a1a
Hall, S.
a11a8f8b-d6fb-47a7-82b1-1f76d2f170dc
Bagnall, D.
5d84abc8-77e5-43f7-97cb-e28533f25ef1
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Mitrovic, I.Z.
a1d3f694-b084-42b4-ac61-25a540be3e64
Buiu, O.
a994b22e-018b-4355-abd5-0227724f2a1a
Hall, S.
a11a8f8b-d6fb-47a7-82b1-1f76d2f170dc
Bagnall, D.
5d84abc8-77e5-43f7-97cb-e28533f25ef1
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038

Mitrovic, I.Z., Buiu, O., Hall, S., Bagnall, D. and Ashburn, P. (2005) Review of SiGe HBTs on SOI. Solid-State Electronics, 49 (9), 1556-1567.

Record type: Article

Abstract

This paper reviews progress in SiGe Heterojunction Bipolar Transistors (HBT) on Silicon-On-Insulator (SOI) technology. SiGe HBTs on SOI are attractive for mixed signal radio frequency (RF) applications and have been of increasing research interest due to their compatibility with SOI CMOS (Complementary Metal Oxide Semiconductor) technology. In bipolar technology, the use of SOI substrate eliminates parasitic substrate transistors and associated latch-up, and has the ability to reduce crosstalk, particularly when combined with buried groundplanes (GP). Various technological SOI bipolar concepts are reviewed with special emphasis on the state-of-the-art SOI SiGe HBT devices in vertical and lateral design. More in depth results are shown from a UK consortium advanced RF platform technology, which includes SOI SiGe HBTs. Bonded wafer technology was developed to allow incorporation of buried silicide layers both above and below the buried oxide. New electrical and noise characterisation results pointed to reduced 1/f noise in these devices compared to bulk counterparts. The lower noise is purported to arise from strain relief of the device structure due to the elasticity of the buried oxide layer during the high temperature epitaxial layer growth. The novel concept of the silicide SOI (SSOI) SiGe HBT technology developed for targeting a reduction in collector resistance, as well as for suppressing the crosstalk, is outlined. The buried tungsten silicide layers were found to have negligible impact on junction leakage. Further to vertical SiGe HBTs on SOI, the challenges of fabricating a lateral SOI SiGe HBT structure are presented.

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Published date: September 2005
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 262113
URI: https://eprints.soton.ac.uk/id/eprint/262113
ISSN: 0038-1101
PURE UUID: 15933b70-5aec-49e1-acca-3cb9d4056546

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Date deposited: 23 Mar 2006
Last modified: 19 Jul 2019 22:32

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