On the Design of Self-checking Controllers with Datapath Interactions
On the Design of Self-checking Controllers with Datapath Interactions
We consider the problem of designing self-checking controllers for controller / datapath architectures. We introduce the concept of intrinsically secure states. We present six alternative schemes based on parity checking, on 1-out-of-n checking, as well as on the observation that a self-checking sequential datapath can also be employed for control path self-checking, by exploiting the concept of intrinsically secure control states. A high-level synthesis tool has been modified to automatically insert self-checking controllers and datapath units, and is able to trade this self-checking property against other design objectives. We discuss the properties of each configuration, and present experimental results and conclusions.
Reliability, Testing, and Fault-Tolerance, Redundant design, Error-checking, Automatic synthesis
1423-1434
Oikonomakos, Petros
2d4259bc-b7a3-4a68-af0f-cc680870e949
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
November 2006
Oikonomakos, Petros
2d4259bc-b7a3-4a68-af0f-cc680870e949
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Oikonomakos, Petros and Zwolinski, Mark
(2006)
On the Design of Self-checking Controllers with Datapath Interactions.
IEEE Transactions on Computers, 55 (11), .
Abstract
We consider the problem of designing self-checking controllers for controller / datapath architectures. We introduce the concept of intrinsically secure states. We present six alternative schemes based on parity checking, on 1-out-of-n checking, as well as on the observation that a self-checking sequential datapath can also be employed for control path self-checking, by exploiting the concept of intrinsically secure control states. A high-level synthesis tool has been modified to automatically insert self-checking controllers and datapath units, and is able to trade this self-checking property against other design objectives. We discuss the properties of each configuration, and present experimental results and conclusions.
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Published date: November 2006
Keywords:
Reliability, Testing, and Fault-Tolerance, Redundant design, Error-checking, Automatic synthesis
Identifiers
Local EPrints ID: 262343
URI: http://eprints.soton.ac.uk/id/eprint/262343
ISSN: 0018-9340
PURE UUID: cb736653-4dd8-431c-aff5-45a8f5a114c0
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Date deposited: 11 Apr 2006
Last modified: 15 Mar 2024 02:39
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Contributors
Author:
Petros Oikonomakos
Author:
Mark Zwolinski
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