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A low-power geometric mapping co-processor for high-speed graphics application

A low-power geometric mapping co-processor for high-speed graphics application
A low-power geometric mapping co-processor for high-speed graphics application
In this article we present a novel design of a low-power geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry out any single or a combination of transformations belonging to affine transformation family ranging from 1-D to 3-D. It allows interactive operations which can be defined either by a user (allowing it to be a stand-alone geometric transformation processor) or by a host processor (allowing it to be a co-processor to accelerate certain graphics operations). It occupies a silicon area of 6 mm2 and consumes 40 mW power when synthesized with 0.25?m technology.
CORDIC, low power, graphics processor
3193-3196
Leeke, Selwyn
e0ba18db-e618-464d-a28c-a8012b1d8a88
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Leeke, Selwyn
e0ba18db-e618-464d-a28c-a8012b1d8a88
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd

Leeke, Selwyn and Maharatna, Koushik (2006) A low-power geometric mapping co-processor for high-speed graphics application. IEEE International Symposium on Circuits and Systems (ISCAS) 2006, Greece. pp. 3193-3196 .

Record type: Conference or Workshop Item (Paper)

Abstract

In this article we present a novel design of a low-power geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry out any single or a combination of transformations belonging to affine transformation family ranging from 1-D to 3-D. It allows interactive operations which can be defined either by a user (allowing it to be a stand-alone geometric transformation processor) or by a host processor (allowing it to be a co-processor to accelerate certain graphics operations). It occupies a silicon area of 6 mm2 and consumes 40 mW power when synthesized with 0.25?m technology.

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More information

Published date: 2006
Venue - Dates: IEEE International Symposium on Circuits and Systems (ISCAS) 2006, Greece, 2006-01-01
Keywords: CORDIC, low power, graphics processor
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 263533
URI: https://eprints.soton.ac.uk/id/eprint/263533
PURE UUID: 9f7ee572-5cdd-40ae-94a0-2f32286061df

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Date deposited: 19 Feb 2007
Last modified: 19 Jul 2019 22:28

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