Enhancement of resistivity of Czochralski silicon by deep level manganese doping
Enhancement of resistivity of Czochralski silicon by deep level manganese doping
Deep level manganese Mn doping has been used to fabricate very high resistivity single crystal silicon substrates grown by the Czochralski method. The Mn has been introduced by ion implantation with a dose of 1014 cm-2 of Mn at 100 keV followed by rapid thermal annealing at 800 °C for 36 s. The resistivity of the wafer is enhanced from 600 ohm cm for the undoped substrate to a maximum of 10 kohm cm for the Mn-doped substrate. The experimental data are corroborated using a theoretical model for doping compensation due to deep level impurities. This level of obtained resistivity is suitable for making silicon on-chip integration of radio frequency devices.
1-4
Mallik, K.
889c3785-fc5c-4f6c-a688-969caa0fdcfa
de Groot, C.H.
92cd2e02-fcc4-43da-8816-c86f966be90c
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Wilshaw, P.R.
44181cde-6935-4a17-9fc7-03c65897fc13
April 2006
Mallik, K.
889c3785-fc5c-4f6c-a688-969caa0fdcfa
de Groot, C.H.
92cd2e02-fcc4-43da-8816-c86f966be90c
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Wilshaw, P.R.
44181cde-6935-4a17-9fc7-03c65897fc13
Mallik, K., de Groot, C.H., Ashburn, P. and Wilshaw, P.R.
(2006)
Enhancement of resistivity of Czochralski silicon by deep level manganese doping.
Applied Physics Letters, 89 (11), , [112122].
(doi:10.1063/1.2349836).
Abstract
Deep level manganese Mn doping has been used to fabricate very high resistivity single crystal silicon substrates grown by the Czochralski method. The Mn has been introduced by ion implantation with a dose of 1014 cm-2 of Mn at 100 keV followed by rapid thermal annealing at 800 °C for 36 s. The resistivity of the wafer is enhanced from 600 ohm cm for the undoped substrate to a maximum of 10 kohm cm for the Mn-doped substrate. The experimental data are corroborated using a theoretical model for doping compensation due to deep level impurities. This level of obtained resistivity is suitable for making silicon on-chip integration of radio frequency devices.
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Published date: April 2006
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 263539
URI: http://eprints.soton.ac.uk/id/eprint/263539
ISSN: 0003-6951
PURE UUID: e0dbf615-0830-43d7-aa28-e0b2b0054718
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Date deposited: 19 Feb 2007
Last modified: 15 Mar 2024 03:11
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Author:
K. Mallik
Author:
P.R. Wilshaw
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