Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates
Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates
154-157
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Banerjee, Swapna
0e62324f-d76b-4242-9044-380e4a865adb
1998
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Banerjee, Swapna
0e62324f-d76b-4242-9044-380e4a865adb
Maharatna, Koushik and Banerjee, Swapna
(1998)
Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates.
Int’l Conference on Computers and Devices for Communication (CODEC) 1998, Calcutta, India.
.
Record type:
Conference or Workshop Item
(Paper)
More information
Published date: 1998
Venue - Dates:
Int’l Conference on Computers and Devices for Communication (CODEC) 1998, Calcutta, India, 1998-01-01
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 263562
URI: http://eprints.soton.ac.uk/id/eprint/263562
PURE UUID: 8378d8ff-994f-45aa-ab09-3649549f7f15
Catalogue record
Date deposited: 19 Feb 2007
Last modified: 14 Mar 2024 07:35
Export record
Contributors
Author:
Koushik Maharatna
Author:
Swapna Banerjee
Download statistics
Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.
Loading...
View more statistics