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Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates

Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates
Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates
154-157
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Banerjee, Swapna
0e62324f-d76b-4242-9044-380e4a865adb
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Banerjee, Swapna
0e62324f-d76b-4242-9044-380e4a865adb

Maharatna, Koushik and Banerjee, Swapna (1998) Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates. Int’l Conference on Computers and Devices for Communication (CODEC) 1998, India. pp. 154-157 .

Record type: Conference or Workshop Item (Paper)
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More information

Published date: 1998
Venue - Dates: Int’l Conference on Computers and Devices for Communication (CODEC) 1998, India, 1998-01-01
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 263562
URI: https://eprints.soton.ac.uk/id/eprint/263562
PURE UUID: 8378d8ff-994f-45aa-ab09-3649549f7f15

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Date deposited: 19 Feb 2007
Last modified: 18 Jul 2017 07:44

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Contributors

Author: Swapna Banerjee

University divisions

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