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A New Structure for Datapath Synthesis

A New Structure for Datapath Synthesis
A New Structure for Datapath Synthesis
From high level synthesis point of view, target design can be divided into two parts: controller and datapath. Single shared bus is a suitable structure for datapath synthesis regarding interconnections costs which suffers from several drawbacks such as its low data communication bandwidth. It has also been shown that the word-length of functional units has a great impact on design costs. A combination of both methods is the core idea of this paper which is offering an improved communication structure. In this method datapath is partitioned into groups connected to segmented shared buses and every partition has a different width and all the functional units connected to a bus partition have the same input/output word-lengths. Having controlled the group binding and word-length of the functional units, as well as the other synthesis parameters, a high-level synthesis tool is introduced to implement DSP algorithms in digital hardware. The tool uses a multi-objective optimization genetic algorithm to minimize the circuit area, delay, power consumption and digital noise by selecting optimal grouping and word-length for the shared bus structure. Results demonstrate that savings can be made in the overall system costs by applying this method.
Ahmadi, Arash
c88cc469-b208-4dad-9541-af5e555e0748
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Ahmadi, Arash
c88cc469-b208-4dad-9541-af5e555e0748
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0

Ahmadi, Arash and Zwolinski, Mark (2007) A New Structure for Datapath Synthesis At 12th International CSI Computer Conference. 20 - 22 Feb 2007.

Record type: Conference or Workshop Item (Paper)

Abstract

From high level synthesis point of view, target design can be divided into two parts: controller and datapath. Single shared bus is a suitable structure for datapath synthesis regarding interconnections costs which suffers from several drawbacks such as its low data communication bandwidth. It has also been shown that the word-length of functional units has a great impact on design costs. A combination of both methods is the core idea of this paper which is offering an improved communication structure. In this method datapath is partitioned into groups connected to segmented shared buses and every partition has a different width and all the functional units connected to a bus partition have the same input/output word-lengths. Having controlled the group binding and word-length of the functional units, as well as the other synthesis parameters, a high-level synthesis tool is introduced to implement DSP algorithms in digital hardware. The tool uses a multi-objective optimization genetic algorithm to minimize the circuit area, delay, power consumption and digital noise by selecting optimal grouping and word-length for the shared bus structure. Results demonstrate that savings can be made in the overall system costs by applying this method.

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More information

Published date: 2007
Additional Information: Event Dates: 20-22 February 2007
Venue - Dates: 12th International CSI Computer Conference, 2007-02-20 - 2007-02-22
Organisations: EEE

Identifiers

Local EPrints ID: 263740
URI: http://eprints.soton.ac.uk/id/eprint/263740
PURE UUID: 930bd4d8-43ca-4b2d-9ee1-c54ad45a7c29
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 23 Mar 2007
Last modified: 18 Jul 2017 07:42

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Contributors

Author: Arash Ahmadi
Author: Mark Zwolinski ORCID iD

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