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MW²P-Bus: A New Bus Structure for Datapath Synthesis

Ahmadi, Arash and Zwolinski, Mark (2007) MW²P-Bus: A New Bus Structure for Datapath Synthesis At 3rd UK Embedded Forum, United Kingdom. 02 - 03 Apr 2007.

Record type: Conference or Workshop Item (Paper)


Datapath optimisation has a great impact on the efficiency of computationally intensive embedded designs such as DSP blocks. Bus-oriented design is one of the low cost approaches to datapath synthesis but which suffers from a low data communication bandwidth %uniformly provided for all the connected units. It has been shown, on the other hand, that the word-length of functional units has a great impact on design costs. A combination of both methods is the core idea of this paper by offering an improved bus-oriented structure for datapath synthesis. In this method a datapath is partitioned into groups which are connected to a set of shared buses. Every bus segment has a different width and all the functional units connected to a bus segment have the same word-length. Having controlled the group binding and word-length of the functional units, as well as the other synthesis parameters, a high-level synthesis tool is introduced to implement DSP algorithms in register transfer level specification. The tool uses a multi-objective optimization algorithm to minimize the circuit area, delay, power consumption and digital noise by selecting optimal grouping and word-length for the bus structure. Results demonstrate that 25% to 75% savings can be made in the latency cost by applying this method.

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Published date: 2007
Additional Information: Event Dates: 2-3 April 2007
Venue - Dates: 3rd UK Embedded Forum, United Kingdom, 2007-04-02 - 2007-04-03
Organisations: EEE


Local EPrints ID: 263742
PURE UUID: cd6a559f-45f7-4107-88b6-afbc97fdf8de
ORCID for Mark Zwolinski: ORCID iD

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Date deposited: 23 Mar 2007
Last modified: 18 Jul 2017 07:42

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Author: Arash Ahmadi
Author: Mark Zwolinski ORCID iD

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