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Lateral SiGe heterojunction bipolar transistor by confined selective epitaxial growth: simulation and material growth

Lateral SiGe heterojunction bipolar transistor by confined selective epitaxial growth: simulation and material growth
Lateral SiGe heterojunction bipolar transistor by confined selective epitaxial growth: simulation and material growth
A new design for a lateral SiGe HBT has been based on development studies of confined lateral selective epitaxial growth in cavities built into silicon-on-insulator wafers. A design process is described and modelled. Device simulations indicate devices with maximum fT of 22 GHz with peak gain of 95 and fmax of 14 GHz can be obtained by the processes outlined. The simulation results highlight the feasibility of the design and further improvements and scaling of the device would allow the transistor to operate at even higher frequencies and lower power.
0167-9317
508-513
Pengpad, P.
ac3c8c12-6fee-4677-b9c7-2db6be43d09b
Osman, K.
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Lloyd, N.S.
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Bonar, J.M.
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Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Kemhadjian, H.A.
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Hamel, J.S.
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Bagnall, D.M.
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Pengpad, P.
ac3c8c12-6fee-4677-b9c7-2db6be43d09b
Osman, K.
1f9a05a0-e0d4-4442-80c5-52c378b139e4
Lloyd, N.S.
0c5edf73-bc40-43ed-9737-ebf3b5863c49
Bonar, J.M.
12d01a95-92f9-4aa1-bce0-c857451cbbfe
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Kemhadjian, H.A.
98de2f2a-d331-4dcc-ae4a-34052c956912
Hamel, J.S.
5a4f240e-515d-4546-874c-02fa309d7f75
Bagnall, D.M.
5d84abc8-77e5-43f7-97cb-e28533f25ef1

Pengpad, P., Osman, K., Lloyd, N.S., Bonar, J.M., Ashburn, P., Kemhadjian, H.A., Hamel, J.S. and Bagnall, D.M. (2004) Lateral SiGe heterojunction bipolar transistor by confined selective epitaxial growth: simulation and material growth. Microelectronic Engineering, 73 (6), 508-513.

Record type: Article

Abstract

A new design for a lateral SiGe HBT has been based on development studies of confined lateral selective epitaxial growth in cavities built into silicon-on-insulator wafers. A design process is described and modelled. Device simulations indicate devices with maximum fT of 22 GHz with peak gain of 95 and fmax of 14 GHz can be obtained by the processes outlined. The simulation results highlight the feasibility of the design and further improvements and scaling of the device would allow the transistor to operate at even higher frequencies and lower power.

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Published date: June 2004
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 263756
URI: http://eprints.soton.ac.uk/id/eprint/263756
ISSN: 0167-9317
PURE UUID: 0608c7be-268e-4c1d-8039-d3665fb2c5f3

Catalogue record

Date deposited: 27 Mar 2007
Last modified: 14 Mar 2024 07:37

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Contributors

Author: P. Pengpad
Author: K. Osman
Author: N.S. Lloyd
Author: J.M. Bonar
Author: P. Ashburn
Author: H.A. Kemhadjian
Author: J.S. Hamel
Author: D.M. Bagnall

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