Resistive Bridging Faults DFT with Adaptive Power Management Awareness


(2007) Resistive Bridging Faults DFT with Adaptive Power Management Awareness At 2007 IEEE 16th Asian Test Symposium (ATS’07)

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Description/Abstract

A key design constraint of circuits used in hand-held devices is the power consumption, due mainly to the limitations of battery life. The employment of adaptive power management (APM) methods optimizes the power consumption of such circuits. This paper describes an effective APM-aware DFT technique that consists of a Test Generation Suite, including fault list generation, test pattern generation and fault simulation. The test generation suite is capable of generating test patterns for multiple supply voltage (Vdd) settings to maximize coverage of resistive bridging faults; and a method to reduce the number of Vdd settings without compromising the fault coverage in order to reduce the cost of test. Preliminarily validations of the proposed DFT technique using a number of benchmark circuits demonstrate its effectiveness.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Event Dates: 8-11 October 2007
Keywords: Multi-Vdd Test Generation, Resistive Bridging Fault, Test Point Insertion
ePrint ID: 264203
Date Deposited: 18 Jun 2007
Last Modified: 31 Mar 2016 14:08
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/264203

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