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A 60nm channel length silicon stacked tunnel transistor

A 60nm channel length silicon stacked tunnel transistor
A 60nm channel length silicon stacked tunnel transistor
Nakazato, K.
b12e41d3-3527-48ed-9ecd-b38f774ba838
Itoh, K.
4ecd900d-dc64-4bb9-aeb6-08b18589563e
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Ahmed, H.
f9dabf57-dea0-4cf9-b989-c812b5eedeaf
Nakazato, K.
b12e41d3-3527-48ed-9ecd-b38f774ba838
Itoh, K.
4ecd900d-dc64-4bb9-aeb6-08b18589563e
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Ahmed, H.
f9dabf57-dea0-4cf9-b989-c812b5eedeaf

Nakazato, K., Itoh, K., Mizuta, Hiroshi and Ahmed, H. (1999) A 60nm channel length silicon stacked tunnel transistor At 57th Device Research Conference.

Record type: Conference or Workshop Item (Other)

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More information

Published date: June 1999
Additional Information: Event Dates: June 1999
Venue - Dates: 57th Device Research Conference, 1999-06-01
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 266417
URI: http://eprints.soton.ac.uk/id/eprint/266417
PURE UUID: 00ea4fd6-2334-40c9-a8ee-9c2c9f0859c4

Catalogue record

Date deposited: 30 Jul 2008 09:04
Last modified: 18 Jul 2017 07:16

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Contributors

Author: K. Nakazato
Author: K. Itoh
Author: Hiroshi Mizuta
Author: H. Ahmed

University divisions

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