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A VHDL Primer

Wilson, Peter (2008) A VHDL Primer In, FPGAs: World Class Design.

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Published date: 2008
Organisations: EEE


Local EPrints ID: 266660
PURE UUID: 197e8439-a27a-4766-b0f3-31e8939b9cf8

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Date deposited: 15 Sep 2008 18:24
Last modified: 18 Jul 2017 07:14

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Author: Peter Wilson

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