Yield improvement using configurable analogue transistors
Yield improvement using configurable analogue transistors
Continued process scaling has led to significant yield and reliability challenges for today's designers. Analogue circuits are particularly susceptible to poor variation, driving the need for new yield resilient techniques in this area. A new configurable analogue transistor structure and supporting methodology that facilitates variation compensation at the post-manufacture stage is described. The approach has demonstrated significant yield improvements and can be applied to any analogue circuit.
1132-1134
Wilson, Peter
8a65c092-c197-4f43-b8fc-e12977783cb3
Wilcock, Reuben
039894e9-f32d-49e0-9ebd-fb13bc489feb
11 September 2008
Wilson, Peter
8a65c092-c197-4f43-b8fc-e12977783cb3
Wilcock, Reuben
039894e9-f32d-49e0-9ebd-fb13bc489feb
Wilson, Peter and Wilcock, Reuben
(2008)
Yield improvement using configurable analogue transistors.
Electronics Letters, 44 (19), .
(doi:10.1049/el:20081409).
Abstract
Continued process scaling has led to significant yield and reliability challenges for today's designers. Analogue circuits are particularly susceptible to poor variation, driving the need for new yield resilient techniques in this area. A new configurable analogue transistor structure and supporting methodology that facilitates variation compensation at the post-manufacture stage is described. The approach has demonstrated significant yield improvements and can be applied to any analogue circuit.
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Published date: 11 September 2008
Additional Information:
Imported from ISI Web of Science
Organisations:
EEE
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Local EPrints ID: 266667
URI: http://eprints.soton.ac.uk/id/eprint/266667
ISSN: 0013-5194
PURE UUID: 5da47dff-0fce-435d-9033-eff7e6519fad
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Date deposited: 15 Sep 2008 18:41
Last modified: 14 Mar 2024 08:32
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Contributors
Author:
Peter Wilson
Author:
Reuben Wilcock
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