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Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry

Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry
Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry
Distributed Arithmetic, Low Power Architecture, Multiplierless Implementation, Very Large Scale Integration, Wavelet
285-289
Acharyya, Amit
f7c95a87-04ac-4d13-a74c-0c4d89b1c79c
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Gunn, Steve
306af9b3-a7fa-4381-baf9-5d6a6ec89868
Acharyya, Amit
f7c95a87-04ac-4d13-a74c-0c4d89b1c79c
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Gunn, Steve
306af9b3-a7fa-4381-baf9-5d6a6ec89868

Acharyya, Amit, Maharatna, Koushik, Al-Hashimi, Bashir and Gunn, Steve (2009) Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry. IEEE Transactions on Circuits and Systems. Part 2: Express Briefs, 56 (4), 285-289.

Record type: Article
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Published date: 21 April 2009
Keywords: Distributed Arithmetic, Low Power Architecture, Multiplierless Implementation, Very Large Scale Integration, Wavelet
Organisations: Electronic & Software Systems

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Local EPrints ID: 267280
URI: https://eprints.soton.ac.uk/id/eprint/267280
PURE UUID: 5acb79d2-6bb9-4790-b233-210be2948c51

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Date deposited: 18 Apr 2009 19:22
Last modified: 27 Feb 2018 17:35

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