The University of Southampton
University of Southampton Institutional Repository

Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning

Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning
Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning
To achieve high performance Ge nMOSFETs it is necessary to reduce the metal/semiconductor Schottky barrier heights at the source and drain. Ni/Ge and NiGe/Ge Schottky barriers are fabricated by electrodeposition using n-type Ge substrates. Current (I)–voltage (V) and capacitance (C)–voltage (V) and low temperature I–V measurements are presented. A high-quality Schottky barrier with extremely low reverse leakage current is revealed. The results are shown to fit an inhomogeneous barrier model for thermionic emission over a Schottky barrier. A mean value of 0.57 eV and a standard deviation of 52 meV is obtained for the Schottky barrier height at room temperature. A likely explanation for the distribution of the Schottky barrier height is the spatial variation of the metal induced gap states at the Ge surface due to a variation in interfacial oxide thickness, which de-pins the Fermi level.
0167-9317
1599-1602
Li, Xiaoli
702314b0-2a65-4adb-9ef1-b8c62e8deb9f
Husain, Muhammad
92db1f76-6760-4cf2-8e30-5d4a602fe15b
Kiziroglou, Michail
c65db659-ec9b-4854-b3b5-b45b38556ca7
de Groot, Kees
92cd2e02-fcc4-43da-8816-c86f966be90c
Li, Xiaoli
702314b0-2a65-4adb-9ef1-b8c62e8deb9f
Husain, Muhammad
92db1f76-6760-4cf2-8e30-5d4a602fe15b
Kiziroglou, Michail
c65db659-ec9b-4854-b3b5-b45b38556ca7
de Groot, Kees
92cd2e02-fcc4-43da-8816-c86f966be90c

Li, Xiaoli, Husain, Muhammad, Kiziroglou, Michail and de Groot, Kees (2009) Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning. Microelectronic Engineering, 86 (7-9), 1599-1602.

Record type: Article

Abstract

To achieve high performance Ge nMOSFETs it is necessary to reduce the metal/semiconductor Schottky barrier heights at the source and drain. Ni/Ge and NiGe/Ge Schottky barriers are fabricated by electrodeposition using n-type Ge substrates. Current (I)–voltage (V) and capacitance (C)–voltage (V) and low temperature I–V measurements are presented. A high-quality Schottky barrier with extremely low reverse leakage current is revealed. The results are shown to fit an inhomogeneous barrier model for thermionic emission over a Schottky barrier. A mean value of 0.57 eV and a standard deviation of 52 meV is obtained for the Schottky barrier height at room temperature. A likely explanation for the distribution of the Schottky barrier height is the spatial variation of the metal induced gap states at the Ge surface due to a variation in interfacial oxide thickness, which de-pins the Fermi level.

Text
MEE.pdf - Other
Download (373kB)

More information

Published date: June 2009
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 267416
URI: https://eprints.soton.ac.uk/id/eprint/267416
ISSN: 0167-9317
PURE UUID: efd7bfde-f575-482c-8370-0f65bcd1612e
ORCID for Kees de Groot: ORCID iD orcid.org/0000-0002-3850-7101

Catalogue record

Date deposited: 29 May 2009 06:35
Last modified: 20 Jul 2019 01:05

Export record

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of https://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×