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Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation

El-Maleh, Aiman, Khursheed, Syed Saqib and M. Sait, Sadiq (2005) Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation At Asian Test Symposium.

Record type: Conference or Workshop Item (Other)


In this paper we present efficient Reverse Order Restoration (ROR) based static test compaction techniques for synchronous sequential circuits. Unlike previous ROR techniques that rely on vector-by-vector fault-simulation based restoration of test subsequences, our technique restores test sequences based on efficient test relaxation. The restored test subsequence can be either concatenated to the compacted test sequence, as in previous approaches, or merged with it. Furthermore, it allows the removal of redundant vectors from the restored subsequences using State Traversal technique and incorporates schemes for increasing the fault coverage of restored test subsequences to achieve an overall higher level of compaction. In addition, test relaxation is used to take ROR out of saturation. Experimental results demonstrate the effectiveness of the proposed techniques.

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Published date: December 2005
Venue - Dates: Asian Test Symposium, 2005-12-01
Organisations: Electronic & Software Systems


Local EPrints ID: 267550
PURE UUID: 72096010-60aa-4913-ae16-0e8f4847d2fa

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Date deposited: 11 Jun 2009 12:30
Last modified: 18 Jul 2017 07:03

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Author: Aiman El-Maleh
Author: Syed Saqib Khursheed
Author: Sadiq M. Sait

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