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Modeling of direct tunneling gate current and gate capacitance in deep submicron MOSFETs with high-K dielectric.

Record type: Thesis (Masters)

Scaling down of MOS device dimensions is accompanied by a decrease in gate-oxide thickness and an increase in substrate doping density. When gate oxide thickness becomes less than 2 nm, a subtantial current follows through gate-oxide due to direct tunneling. In order to reduce this current, International Technology Roadmap for Semiconductors (ITRS) has suggested replacement of SiO2 gate insulator layer by high-K dielectrics. For a given equivalent oxide thickness (EOT), high-K dielectrics offer greater physical thickness. The direct tunneling (DT) current and the gate capacitance for an inverted n-MOS device with different dielectrics used as gate insulator is studied. Coupled Schrodinger’s and Poisson’s equations are solved self-consistently. Open boundary conditions, taking account the wavefunction tail inside the gate dielectric within the self-consistent loop are used to solve Schrodinger’s equation. DT current increases exponentially with the decrease of conduction band offset for electrons travelling from silicon substrate to dielectric. As general trend of dielectrics is to decrease of conduction band offset with the increase of dielectric constant, use of high-K material as gate insulator results in prominent influence of direct tunneling of carriers on potential profile. Therefore in DT current calculation effect of wavefunction penetration on potential profile is incorporated within self-consistent loop. Results of this simulation is compared with published experimental results and also with the results of the simulation where penetration effect on potential profile is neglected. Results show that neglect of wavefunction penetration effect on potential profile causes underestimation of DT current. A comprehensive analysis of the effect of wavefunction penetration on the gate capacitance of the MOSFETs with high-K dielectrics is also done. Gate capacitance from conventional modeling is found to be independent of dielectric materials for a given EOT. The study reveals that accounting for wavefunction penetration into the gate dielectric causes gate capacitance to vary from material to material for a given EOT. Consequently wavefunction penetration effects must be considered to determine properties of future generation devices where high-K dielectrics will be employed as gate insulator.

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Hakim, M. M. A. (2002) Modeling of direct tunneling gate current and gate capacitance in deep submicron MOSFETs with high-K dielectric. Bangladesh University of Engineering & Technology (B. U. E. T.), Electrical and Electronic Engineering, Masters Thesis .

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Published date: 2002
Organisations: Nanoelectronics and Nanotechnology


Local EPrints ID: 267568
PURE UUID: a34596e5-04e4-448d-8e5b-63e7ad59ce8f

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Date deposited: 15 Jun 2009 13:24
Last modified: 18 Jul 2017 07:02

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Author: M. M. A. Hakim

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