Hybrid circuit analysis of a suspended-gate silicon nanodot memory (SGSNM) cell
Hybrid circuit analysis of a suspended-gate silicon nanodot memory (SGSNM) cell
Garcia Ramirez, Mario
6110a5eb-c5bc-4b1c-9cc3-6569e5ae3259
Tsuchiya, Yoshishige
5a5178c6-b3a9-4e07-b9b2-9a28e49f1dc2
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
28 September 2009
Garcia Ramirez, Mario
6110a5eb-c5bc-4b1c-9cc3-6569e5ae3259
Tsuchiya, Yoshishige
5a5178c6-b3a9-4e07-b9b2-9a28e49f1dc2
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Garcia Ramirez, Mario, Tsuchiya, Yoshishige and Mizuta, Hiroshi
(2009)
Hybrid circuit analysis of a suspended-gate silicon nanodot memory (SGSNM) cell.
35th International Conference on Micro and Nano Engineering (MNE2009), , Ghent, Belgium.
27 Sep 2009.
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Published date: 28 September 2009
Venue - Dates:
35th International Conference on Micro and Nano Engineering (MNE2009), , Ghent, Belgium, 2009-09-27 - 2009-09-27
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 267684
URI: http://eprints.soton.ac.uk/id/eprint/267684
PURE UUID: dfaad6dc-1f56-4585-93a4-a3b04930c12c
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Date deposited: 19 Jul 2009 13:34
Last modified: 10 Dec 2021 22:36
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Contributors
Author:
Mario Garcia Ramirez
Author:
Yoshishige Tsuchiya
Author:
Hiroshi Mizuta
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