Continuous Verification of Large Embedded Software using SMT-Based Bounded Model Checking
Continuous Verification of Large Embedded Software using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall product quality. In this context, SAT-based bounded model checking has been successfully applied to discover subtle errors, but for larger applications, it often suffers from the state space explosion problem. This paper describes a new approach called continuous verification to detect design errors as quickly as possible by looking at the Software Configuration Management (SCM) system and by combining dynamic and static verification to reduce the state space to be explored. We also give a set of encodings that provide accurate support for program verification and use different background theories in order to improve scalability and precision in a completely automatic way. A case study from the telecommunications domain shows that the proposed approach improves the error-detection capability and reduces the overall verification time by up to 50%.
Cordeiro, Lucas
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Fischer, Bernd
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Marques-Silva, Joao
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Cordeiro, Lucas
3580f117-e41c-4235-982c-51d383e40883
Fischer, Bernd
0c9575e6-d099-47f1-b3a2-2dbc93c53d18
Marques-Silva, Joao
f992f61f-cedd-4897-9f73-1a3ac7ebb35c
Cordeiro, Lucas, Fischer, Bernd and Marques-Silva, Joao
(2009)
Continuous Verification of Large Embedded Software using SMT-Based Bounded Model Checking
(Submitted)
Record type:
Monograph
(Project Report)
Abstract
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall product quality. In this context, SAT-based bounded model checking has been successfully applied to discover subtle errors, but for larger applications, it often suffers from the state space explosion problem. This paper describes a new approach called continuous verification to detect design errors as quickly as possible by looking at the Software Configuration Management (SCM) system and by combining dynamic and static verification to reduce the state space to be explored. We also give a set of encodings that provide accurate support for program verification and use different background theories in order to improve scalability and precision in a completely automatic way. A case study from the telecommunications domain shows that the proposed approach improves the error-detection capability and reduces the overall verification time by up to 50%.
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Technical-Report.pdf
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Submitted date: November 2009
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 268236
URI: http://eprints.soton.ac.uk/id/eprint/268236
PURE UUID: fad1d7cb-903c-4aeb-a3c2-ae7dfc9a1cfd
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Date deposited: 19 Nov 2009 12:26
Last modified: 14 Mar 2024 09:06
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Contributors
Author:
Lucas Cordeiro
Author:
Bernd Fischer
Author:
Joao Marques-Silva
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