SMT-Based Bounded Model Checking for Multi-threaded Software in Embedded Systems
SMT-Based Bounded Model Checking for Multi-threaded Software in Embedded Systems
The transition from single-core to multi-core processors has made multi-threaded software an important subject over the last years in computer-aided verification. Model checkers have been successfully applied to discover subtle errors, but they suffer from combinatorial state space explosion when verifying multi-threaded software. In our previous work, we have extended the encodings from SMT-based bounded model checking (BMC) to provide more accurate support for program verification and to use different background theories and solvers in order to improve scalability and precision in a completely automatic way. We now focus on extending this work to support an SMT-based BMC formulation of multi-threaded software which allows the state space to be reduced by abstracting the number of state variables and interleavings from the proof of unsatisfiability generated by the SMT solvers. The core idea of our approach aims to extract the proof objects produced by the SMT solvers in order to control the number of interleavings and to remove logic that is not relevant to a given property. This work aims to develop a new algorithmic method and corresponding tools based on SMT to verify embedded software in multi-core systems.
978-1-60558-719-6
373-376
Cordeiro, Lucas
3580f117-e41c-4235-982c-51d383e40883
4 May 2010
Cordeiro, Lucas
3580f117-e41c-4235-982c-51d383e40883
Cordeiro, Lucas
(2010)
SMT-Based Bounded Model Checking for Multi-threaded Software in Embedded Systems.
32nd ACM/IEEE International Conference on Software Engineering (Doctoral Symposium), Cape Town, South Africa.
02 - 08 May 2010.
.
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Conference or Workshop Item
(Other)
Abstract
The transition from single-core to multi-core processors has made multi-threaded software an important subject over the last years in computer-aided verification. Model checkers have been successfully applied to discover subtle errors, but they suffer from combinatorial state space explosion when verifying multi-threaded software. In our previous work, we have extended the encodings from SMT-based bounded model checking (BMC) to provide more accurate support for program verification and to use different background theories and solvers in order to improve scalability and precision in a completely automatic way. We now focus on extending this work to support an SMT-based BMC formulation of multi-threaded software which allows the state space to be reduced by abstracting the number of state variables and interleavings from the proof of unsatisfiability generated by the SMT solvers. The core idea of our approach aims to extract the proof objects produced by the SMT solvers in order to control the number of interleavings and to remove logic that is not relevant to a given property. This work aims to develop a new algorithmic method and corresponding tools based on SMT to verify embedded software in multi-core systems.
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e-pub ahead of print date: 2 May 2010
Published date: 4 May 2010
Additional Information:
Event Dates: 2-8 May, 2010
Venue - Dates:
32nd ACM/IEEE International Conference on Software Engineering (Doctoral Symposium), Cape Town, South Africa, 2010-05-02 - 2010-05-08
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 268471
URI: http://eprints.soton.ac.uk/id/eprint/268471
ISBN: 978-1-60558-719-6
PURE UUID: 3a5fd2c2-8f60-4e4e-b270-c472a25539b4
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Date deposited: 05 Feb 2010 13:46
Last modified: 14 Mar 2024 09:11
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Author:
Lucas Cordeiro
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