Yield improvement using configurable analogue transistors


Wilson, PR and Wilcock, R (2008) Yield improvement using configurable analogue transistors Electronics Letters, 44, pp. 1132-1133.

Download

Full text not available from this repository.

Description/Abstract

Continued process scaling has led to significant yield and reliability challenges for today's designers. Analogue circuits are particularly susceptible to poor variation, driving the need for new yield resilient techniques in this area. A new configurable analogue transistor structure and supporting methodology that facilitates variation compensation at the post-manufacture stage is described. The approach has demonstrated significant yield improvements and can be applied to any analogue circuit.

Item Type: Article
Additional Information: Imported from ISI Web of Science
Organisations: Electronics & Computer Science
ePrint ID: 269506
Date :
Date Event
2008Published
Date Deposited: 21 Apr 2010 07:46
Last Modified: 17 Apr 2017 18:29
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/269506

Actions (login required)

View Item View Item