Li, Liang, Maunder, Robert G., Al-Hashimi, Bashir and Hanzo, Lajos
A low-complexity turbo decoder architecture for energy-efficient wireless sensor networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 21, (1), . (doi:10.1109/TVLSI.2011.2177104).
Turbo codes have recently been considered for energy-constrained wireless communication applications, since they facilitate a low transmission energy consumption. However, in order to reduce the overall energy consumption, Look-Up- Table-Log-BCJR (LUT-Log-BCJR) architectures having a low processing energy consumption are required. In this paper, we decompose the LUT-Log-BCJR architecture into its most fundamental Add Compare Select (ACS) operations and perform them using a novel low-complexity ACS unit. We demonstrate that our architecture employs an order of magnitude fewer gates than the most recent LUT-Log-BCJR architectures, facilitating a 71% energy consumption reduction. Compared to state-of- the-art Maximum Logarithmic Bahl-Cocke-Jelinek-Raviv (Max- Log-BCJR) implementations, our approach facilitates a 10% reduction in the overall energy consumption at ranges above 58 m.
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