Co-ordinate Rotation based Low Complexity N-D FastICA Algorithm and Architecture
Co-ordinate Rotation based Low Complexity N-D FastICA Algorithm and Architecture
This paper proposes a low complexity n-dimensional (nD) FastICA algorithm and architecture by introducing the concept of coordinate rotation where. The proposed algorithm can merge the two key steps of conventional FastICA—preprocessing and update and is therefore capable of reducing the hardware complexity of the conventional FastICA significantly as demonstrated in this paper. Hardware implementation can further be simplified due to the recursive nature of the proposed algorithm where the same hardware module can be used as the fundamental core to implement architecture. Together with the algorithm formulation, its functionality is also validated and hardware complexity is analyzed and compared with the conventional FastICA.
blind source separation, CORDIC, FastICA, independent component analysis, low complexity algorithm and architecture
3997-4011
Acharyya, Amit
1f8a0620-1c00-4306-a64c-5185ede71f38
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Reeve, Jeff
dd909010-7d44-44ea-83fe-a09e4d492618
August 2011
Acharyya, Amit
1f8a0620-1c00-4306-a64c-5185ede71f38
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Reeve, Jeff
dd909010-7d44-44ea-83fe-a09e4d492618
Acharyya, Amit, Maharatna, Koushik, Al-Hashimi, Bashir and Reeve, Jeff
(2011)
Co-ordinate Rotation based Low Complexity N-D FastICA Algorithm and Architecture.
IEEE Transactions on Signal Processing, 59 (8), .
(doi:10.1109/TSP.2011.2150219).
Abstract
This paper proposes a low complexity n-dimensional (nD) FastICA algorithm and architecture by introducing the concept of coordinate rotation where. The proposed algorithm can merge the two key steps of conventional FastICA—preprocessing and update and is therefore capable of reducing the hardware complexity of the conventional FastICA significantly as demonstrated in this paper. Hardware implementation can further be simplified due to the recursive nature of the proposed algorithm where the same hardware module can be used as the fundamental core to implement architecture. Together with the algorithm formulation, its functionality is also validated and hardware complexity is analyzed and compared with the conventional FastICA.
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tsp_cordic-fica-accepted-eprints
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Submitted date: 20 April 2011
e-pub ahead of print date: 5 May 2011
Published date: August 2011
Keywords:
blind source separation, CORDIC, FastICA, independent component analysis, low complexity algorithm and architecture
Organisations:
Electronic & Software Systems, EEE
Identifiers
Local EPrints ID: 272221
URI: http://eprints.soton.ac.uk/id/eprint/272221
ISSN: 1053-587X
PURE UUID: 4721ff20-55e9-4e4e-a036-caa43d5518a7
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Date deposited: 21 Apr 2011 10:29
Last modified: 14 Mar 2024 09:50
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Contributors
Author:
Amit Acharyya
Author:
Koushik Maharatna
Author:
Bashir Al-Hashimi
Author:
Jeff Reeve
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